High-level synthesis of applications specified using behavioral description in high-level languages (such as MATLAB etc.) onto targets depends on the architecture specific details of the target. Architecture-specific details may include configuration and layout of the target device, memory organization, interconnection organization and protocols, embedded functional units and their numbers and capabilities, control configurations and requirements, etc. Therefore, a compiler or a tool, which takes a high-level specification of the application as input for synthesis on a particular target architecture has to be specific to the architecture. Accordingly, there is a need for an improved approach to specify or compile design information.